/*----------------------------------------------------------------------
 *
 *  Copyright 2007, Thomas Dejanovic.
 *
 *  This is free software; you can redistribute it and/or modify it
 *  under the terms of the GNU Lesser General Public License as
 *  published by the Free Software Foundation; either version 2.1 of
 *  the License, or (at your option) any later version.
 *
 *  This software is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
 *  Lesser General Public License for more details.
 *
 *  You should have received a copy of the GNU Lesser General Public
 *  License along with this software; if not, write to the Free
 *  Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 *  02110-1301 USA, or see the FSF site: http://www.fsf.org.
 *
 *----------------------------------------------------------------------
 *
 *
 *
 *----------------------------------------------------------------------
 *  id = $Id: testbench_002.v 667 2010-07-01 00:12:17Z jayshurtz $
 *  $URL: http://hatch.googlecode.com/svn/tags/taggle_release_3.0/test/old_tests/rtl/testbench_002.v $
 *  $Author: jayshurtz $
 *---------------------------------------------------------------------*/

module testbench_001
  ();


  //---------------------------------------------------------------------
  // register and wire definitions


  //---------------------------------------------------------------------

endmodule // testbench_001

// Local Variables:
// verilog-library-directories:("." "..")
// verilog-library-extensions:(".v")
// End:

